Taiwan Semiconductor Manufacturing Co. the world's largest contract chipmaker, has begun operating a production line for its next-generation packaging technology, Chip on Panel on Substrate (CoPoS), at Advanced Packaging Fab 7 in Chiayi, Taiwan. The facility is in full-scale testing of key equipment and materials.
CoPoS is an evolution of TSMC's existing Chip on Wafer on Substrate (CoWoS) packaging. The key difference: CoPoS uses a square glass interposer—the intermediate layer connecting chip to substrate—rather than a round silicon wafer. Glass resists deformation under heat, a critical advantage for power-hungry AI chips, and its square geometry cuts wasted area compared to round wafers while enabling easier scaling for the oversized dies now in development.
The material shift also matters to the bottom line. Glass costs far less than silicon, potentially lowering production expenses for advanced AI processors. But glass is fragile and harder to process than silicon, complicating integration into high-volume manufacturing.
Industry projections for CoPoS mass production have accelerated. Morgan Stanley recently forecast 2028 as a viable start date, driven by two forces: severe undersupply of current CoWoS packaging and AI chips that are growing so large they demand more efficient, scalable solutions. Intel's Embedded Multi-die Interconnect Bridge-T, which costs 50 percent less than CoWoS, is also preparing for mass production next year, adding competitive pressure.
TSMC is aggressively expanding its CoPoS footprint. The company is reportedly weighing the acquisition of two plants from display-panel maker AUO in Central Taiwan's science park for over NT$30 billion—approximately $930 million—to support fan-out panel-level packaging and CoPoS production, tapping AUO's glass substrate expertise. TSMC's 3DIC research lab in Japan has also invested substantially in glass substrate work, including development of Through Glass Vias.
Korean rivals are matching that push. Samsung Electronics targets glass interposer adoption in 2028, while Samsung Electro-Mechanics has operated a glass substrate pilot line in Sejong since 2025 and launched Glasem, a joint venture with Japan's Sumitomo Chemical, to produce substrate materials. SK Absolics is aiming for mass production in 2027; LG Innotek targets 2028. Glass substrates enable flatter surfaces and tighter circuit routing without an interposer, offering less deformation than plastic alternatives.
The shift reflects a deeper industrial migration: display-panel plants are converting into semiconductor packaging facilities as TSMC, ASE, and others expand large-scale production capacity to absorb surging demand from the AI buildout.
